In a typical optoelectronic component or module, the issue concerning thermal spreading substantially affects the efficiency and reliability of the component or module. As known in the art, high thermal resistance in the structure of the component or module results in poor thermal performance. Usually, the problem concerning high thermal resistance was caused by materials or interfaces formed in the structure of the component or module.
FIG. 1 is a side cross-sectional view illustrating the structure of a conventional optoelectronic semiconductor package 100, which comprises a substrate 110, an optoelectronic semiconductor chip 111, a joint layer 112, a bonding metal 113, and an isolation layer 114. The conventional semiconductor package 100 is manufactured by processes as follows: providing a substrate 110; depositing an isolation layer 114 over the upper surface of the substrate 110; forming a bonding metal 113 on the isolation layer 114; forming a joint layer 112 over the bonding metal 113; and positioning the optoelectronic semiconductor chip 111 on the joint layer 112 so as to mount the optoelectronic semiconductor chip 111 onto the substrate 100. Ag-epoxy or solder is generally used as the material of the joint layer 112 and Ag (silver), Cu (Copper), or Al (Aluminum) is generally used as the material of the boding metal 113 when the solder related material using as joint material. The substrate 110 may be a MCPCB (Metal Core PCB) substrate, which is made of Al or Cu. Alternatively, the substrate 110 may be made of silicon, ceramic, or polymers. The isolation layer 114 is made of epoxy or polymer or silicon dioxide to isolate the metal circuit from the substrate 110 when a semi-conductor based substrate, e.g., silicon substrate, or metal based substrate, e.g., Al or Cu substrate, is used. The structure of the semiconductor package 100 is fabricated by conventional deposition processes which are well-known in the technical field of semiconductor fabricating processes, hence the detailed manufacturing processes are omitted here for brevity.
As shown in FIG. 1, it can be noted that there are many heat spreading barriers (joint layer 112, isolation layer 114, and the substrate 110 made of silicon, ceramic, or polymers) in the traditional package structure for the optoelectronic device such that heat can not be spread and dissipated rapidly and efficiently. Therefore, a new semiconductor package structure is needed so as to address the above-mentioned drawbacks.
In the issued U.S. Pat. No. 6,730,533, entitled “Plastic Packaging of LED Arrays,” a method of forming a flexible circuit module is provided. The method comprises forming a conductive interconnect pattern having a first portion over a second side of the flexible module base and a plurality of second portions extending through the flexible module base toward the at least one rigid carrier. However, satisfying heat spreading performance cannot be achieved merely by the conductive interconnect pattern LED and flexible substrate disclosed in this patent.
In another issued U.S. Pat. No. 6,964,877, entitled “LED Power Package,” a thermal conduction path for thermally conducting heat from the flip-chip bonded LED dice to the solderable backside of the electrically insulating sub-mount wafer is provided. As shown in FIG. 9 of this prior art, the solder related material, which is considered to be a heat spreading barrier, is disposed in the thermal conduction path, hence the performance of thermal conduction in the structure is still need to be improved.
U.S. Pat. No. 6,966,674, entitled “Backlight Module and Heat dissipation Structure thereof,” also describes a heat dissipation structure for a backlight module comprising a circuit board having a through hole with a light emitting diode (LED) corresponding thereto, disposed on one side of the circuit board. The structure comprises a thermal conductive element disposed between the heat conducting portion and the LED, the thermal conducting element is made of a soft material that is not damaging to the LED. Since there is still a heat spreading barrier (the soft thermal conductive pad or paste) between LED and thermal conducting elements, satisfying performance of heat spreading is not achieved.
In another issued U.S. Pat. No. 7,262,440, entitled “Light Emitting Diode Package and Fabrication Method thereof,” a light emitting diode package is proposed. The package comprises: a lower metal layer, a first silicon layer, a first insulation layer, a second silicon layer, a second insulation layer and a package electrode pattern; a spacer, an LED, and an optical element. Obviously, there are too many layers stacked between LED and the thermal conduction element so that too many heat barriers are created in the structure.
Moreover, U.S. Pat. No. 7,329,942, entitled “Array-type Modularized Light-emitting Diode Structure and a Method for Packaging the Structure,” provides a method for packaging an array-type modularized light-emitting diode structure, in which the upper substrate is made from the material to have multiple arrayed dents and at least two through holes passing through the bottom of each dent, a conductive material is implanted in each through hole. However, as shown in the drawings and illustrated in the specification, the thermal element contacts merely the electrode such that the contacting area for spreading or dissipating heat is restricted. Therefore, desired heat spreading performance cannot be obtained.
In view of the above, among all these prior arts, at least one thermal barrier between LED and the thermal conductive element is disclosed. In addition, the discrete heat column/thermal via design only guides heat from the heat source to specific direction, which is insufficient for heat spreading. Moreover, all bonding materials (epoxy, silver epoxy, solder, etc.) between the optoelectronic element and the substrate would form the weak thermal contact and increase the thermal resistance.
Therefore, in order to reduce the thermal resistance in a package for a semiconductor chip, such as an optoelectronic device, and ensure desirable performance together with high reliability, there exists a need for an efficient heat spreading structure in a module or a package, which could be easily realized on any kinds of substrates by matured wafer-level or panel-level semiconductor fabricating process.